Hello ZCash Community!
All of the recent discussions about the benefits and weaknesses of various mining hardware such as GPUs, FPGAs and ASICS gave me the idea of trying to develop my own low cost SoC FPGA for Equihash mining.
I’ve decide to use the Terasic DE10-nano development board which is a low cost FPGA designed for academia. It is based off of the Altera Cyclone V - 5CSEBA6U2317. I chose this board for it’s a lost cost and energy efficiency. ThE DE10-nano is a SoC FPGA with a dual core 800mhz ARM processor, 1GB of DDR3 and 110K logic elements for $130 USD.
A few modifications have to be done to the board which include a heat sink and fan as the ARM processor will get quite warm under load. At this point in the project I’m still assembling the device hardware, but I hope to get working on some actual HDL pretty soon.
That being said, I’m pretty new to HDL design and implementation, but I have over 12 years experience in software development. I expect my progress to be fairly slow as this will also be a learning opportunity for me. At worst, I think this project could serve as a proof of concept and provide an opportunity to develop an extremely efficient equihash HDL implementation that could then be translated to more powerful FPGA equipment.
My primary goals are:
- To facilitate my own learning about SoC FPGA development
- To create an Altera Cyclone V implementation of equihash.
If anyone is interested in helping or supporting this project please feel free to contact me, any help is much appreciated.